Regviz

Renesas Electronics /R7FA6T3BB /GPT16E0 /GTSECR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GTSECR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Renesas Electronics/R7FA6T3BB/GPT16E0/GTSECR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SBDCE 0 (0)SBDPE 0 (0)SBDAE 0 (0)SBDDE 0 (0)SBDCD 0 (0)SBDPD 0 (0)SBDAD 0 (0)SBDDD 0 (0)SPCE 0 (0)SPCD

SBDDD=0, SBDAD=0, SBDAE=0, SBDPE=0, SBDCE=0, SPCD=0, SBDPD=0, SBDCD=0, SPCE=0, SBDDE=0

Description

General PWM Timer Operation Enable Bit Simultaneous Control Register

Fields

SBDCE

GTCCR Register Buffer Operation Simultaneous Enable

0 (0): Disable simultaneous enabling GTCCR buffer operations

1 (1): Enable GTCCR register buffer operations simultaneously
SBDPE

GTPR Register Buffer Operation Simultaneous Enable

0 (0): Disable simultaneous enabling GTPR buffer operations

1 (1): Enable GTPR register buffer operations simultaneously
SBDAE

GTADTR Register Buffer Operation Simultaneous Enable

0 (0): Disable simultaneous enabling GTADTR buffer operations

1 (1): Enable GTADTR register buffer operations simultaneously
SBDDE

GTDV Register Buffer Operation Simultaneous Enable

0 (0): Disable simultaneous enabling GTDV buffer operations

1 (1): Enable GTDV register buffer operations simultaneously
SBDCD

GTCCR Register Buffer Operation Simultaneous Disable

0 (0): Disable simultaneous disabling GTCCR buffer operations

1 (1): Disable GTCCR register buffer operations simultaneously
SBDPD

GTPR Register Buffer Operation Simultaneous Disable

0 (0): Disable simultaneous disabling GTPR buffer operations

1 (1): Disable GTPR register buffer operations simultaneously
SBDAD

GTADTR Register Buffer Operation Simultaneous Disable

0 (0): Disable simultaneous disabling GTADTR buffer operations

1 (1): Disable GTADTR register buffer operations simultaneously
SBDDD

GTDV Register Buffer Operation Simultaneous Disable

0 (0): Disable simultaneous disabling GTDV buffer operations

1 (1): Disable GTDV register buffer operations simultaneously
SPCE

Period Count Function Simultaneous Enable

0 (0): Disable simultaneous enabling period count function

1 (1): Enable period count function simultaneously
SPCD

Period Count Function Simultaneous Disable

0 (0): Disable simultaneous disabling period count function

1 (1): Disable period count function simultaneously

Links

()

Register License

This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all applicable laws, including copyright laws.

THIS SOFTWARE IS PROVIDED “AS IS” AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of this software. By using this software, you agree to the additional terms and conditions found by accessing the following link: http://www.renesas.com/disclaimer

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data